1. Field of the Invention
The present invention relates to diode packages, and more particularly to a diode chip package no containing outer lead pins and a process for producing the diode package.
2. Description of Related Art
As shown in FIG. 1, a packaged IC or semiconductor device 80 (hereinafter referred to as a semiconductor package 80) contains three important key components, namely, a lead frame 81, bonding wires 82 and a sealed housing 83.
Before packaged, an IC or semiconductor die 84 (hereinafter referred to as a semiconductor chip 84) is firstly bound onto a die pad (or chip holder) of the lead frame 81, and then said bonding wires 82 allow to make interconnections between said semiconductor chip 84 and said lead frame 81 during semiconductor device fabrication, so that the semiconductor chip 84 is electrically connected to the lead frame 81. Moreover, the sealed housing 83 is to package said lead frame 81 and said semiconductor chip 84 and make them isolated from outside environment as well as to allow some outer lead pins (or contacts) 85 to be extended from the lead frame 81 to relative lateral surfaces (or a lower surface) of the semiconductor package 80 thereof and finally further extendedly exposed to outside environment.
The semiconductor package 80 can be formed with Pin-Through-Hole (PTH) package or Surface-Mount Technology (SMT) package and used to install in a socket or directly soldered to a printed circuit board to transfer internal functions of the semiconductor package 80 to an external interface of the printed circuit board.
Accordingly, during semiconductor device fabrication the lead frame 81 plays a role of key component to dominate a preferred quality of the semiconductor package 80, so that different lead frames are suitably varied for use in package of various semiconductor chips 84.
As shown in FIG. 1, when a semiconductor diode chip with a p-n junction (hereinafter referred to a diode chip) is chosen to replace said semiconductor chip 84, there are various kinds of lead frames 81 with different shapes of outer lead pins 85 shown in FIG. 2 can be chosen to produce a semiconductor diode package 90 (hereinafter referred to as a diode package 90) during semiconductor device fabrication.
Presently, all known diode packages 90 have outer lead pins 85 formed as a basic structure. However, said diode packages 90 due to having outer lead pins 85 is apt to cause problems of dimensional inaccuracy, this shortcoming tends to jeopardize and affect stability of processing a Surface-Mount Technology (SMT) package for the diode packages 90.